It has been noted in the media that at the upcoming ISSCC conference in late February, Intel is preparing to give a talk titled “Bonanza Mine: An Ultra-Low Voltage Energy Efficient Bitcoin Mining ASIC.” It’s already getting a lot of attention, as it confirms the fact that Intel is working on blockchain-enabled hardware. Through a number of channels, we were able to acquire more details on this chip ahead of the conference.
DS1 means there will be a demo
The more computing power a miner has, the more rewards the miner will receive from the blockchain over a period of time – it always becomes a contest between the big players to get a bigger share of the computing power to earn more rewards . Originally it ranged from CPUs to GPUs, FPGAs and now hardware designed specifically for the sole purpose of processing blockchain and earning those rewards. The current state of affairs in bitcoin mining is driven by application-specific integrated circuits, or ASICs. There are companies in the industry, such as Bitmain and MicroBT, working with partners such as TSMC to create Bitcoin-specific silicon as miners to hunt proof-of-work cryptocurrency.
Hardware from AMD and NVIDIA was used when bitcoin mining was GPU-focused, but because the bitcoin algorithm can be further accelerated, ASICs were created. Currently, these GPUs are now being used for ASIC-resistant algorithms and chains such as Ethereum, and that’s part of the reason (but not the only one) why gaming graphics card prices are so high – if you can “earn” enough mining to pay off the card in weeks or months, it becomes an easy purchase for large mining operations. With Bitcoin however, the trend towards ASICs has presented several orders of magnitude better performance for the same power. Ultimately, these proof-of-work systems are limited by the amount of hardware and the amount of power available – Intel citing an estimated 91 TWh annual electricity consumption on Bitcoin today (although it doesn’t mention not the source of this energy).
ASIC inside a WhatsMiner M30S-88T, for example
In the early days of ASICs, they were basically scaled and scaled FPGA-hardened IP blocks. The need to produce and activate silicon very quickly made it very rushed initially, and the companies involved had limited experience with traditional silicon development and deployment timelines. That was several years ago now, and some of these companies are on their 8and generation of ASICs, and are leading partners in leading foundries at the cutting edge of process technologies. Silicon is small which leads to high yields and with the right advantage can be very profitable. For example, Bitmain’s next-generation ASIC product installs 384 chips in a system and, in a single transaction, has already sold 78000 systems (29.5 million chips) to Marathon Digital Holdings for $879 million – and that’s just one customer. Sometimes, in a gold rush, it is those who sell the axes who make the money.
However, in the context of more traditional silicon players, we haven’t seen much movement on this front. GPU vendors are battling with miners and Ethereum, but there hasn’t really been any movement on targeted silicon in this area — at least until Intel starts dropping hints. Back in December, Intel’s Raja Koduri hinted that the company was heading into this space, and with the announced conference at ISSCC next month, it confirms it. But we have more details.
Intel’s first generation ASIC: BZM1
Intel has two generations of SHA-256 ASICs. The first, BZM1, is the subject of the conference at the ISSCC. Intel builds the chip on a 7nm process. Exactly what isn’t listed – the docs we have say ‘7nm’, but the same doc also refers to Intel 4 as ‘4nm’. In all likelihood this means that BZM1 is being built at Intel, and this could be one of the first IDM 2.0 clients for Intel using Intel’s in-house custom design team – the SEC filing is co-signed by the general manager of custom accelerators at Intel, for context.
The chip is 14.16mm2 (so a maximum of 4000 chips per wafer), operates at 1.6 GHz and generates 137 gigahash (137GH) per second at 2.5 W. 25 of these chips are used in a deep board configuration, stacked voltage at 335 mV per chip, totaling Main power 8.875V.
It should be noted that 335 mV per chip as the minimum voltage is incredibly low. Intel claims it is the most technically advanced Bitcoin ASIC to date, using an ultra-low-voltage design, specialized clocking strategies, and other circuitry and microarchitecture optimizations – more details in the ISSCC conference in February.
Intel is going to tell the ISSCC that it takes 55 J per TH, although the math here doesn’t make sense given the other numbers it presents. At 137 GH and 2.5 W, that would mean 18.2 W/TH. For context:
| Bitcoin ASICs | ||||||
| AnandTech | chip or System |
Hash rate | To be able to | Efficiency | Node | Cost* (1 unit) |
| Intel BZM2 | Chip | ? | ? | ? | TSMC N5** | – |
| Intel BZM1 | Chip | 137GH | 2.5W | 18.2W/TH | Intel 7nm | – |
| Bitmain S19j XP | Chip | ? | ? | 21.5W/TH | TSMC N5 |
$11620 |
| System | 140TH | 3010W | ||||
| Bitmain S19j Pro 104T |
Chip | 270GH | 7.99W | 29.5W/TH | TSMC N7 |
$11024 |
| System | 104TH | 3068W | ||||
| MicroBT M30S++ | Chip | 252GH | 7.82W | 31.0W/TH | Samsung 8nm |
$13035 |
| System | 112TH | 3472W | ||||
*Cost varies by BTC. Rates displayed on 20/01/2022.
** Sole source of information not confirmed
Intel’s second generation ASIC: BZM2
Intel’s second-generation chip is listed in an SEC filing. According to the file, it is called BZM2, and there is already a financial agreement with a client. The filing is a four-year supply agreement between Intel and Griid Infrastructure, beginning September 8and, 2021, and the BZM2 chip is designed specifically for SHA-256 cryptographic hash functions. While the exact purchase contract numbers are redacted, Griid must provide an 18-month rolling forecast of the requested supply that Intel will work towards, with a specific reservation quantity and minimum deposit at the start of the agreement. These chips will ship until May 2023, although the contract may be extended. Intel does not provide any warranty on chips except DOA, and also provides 3 months support after each batch of chips are shipped.
In the record, details of BZM2 are redacted.
There are two versions of BZM2, probably different in terms of power and performance, although the exact numbers are redacted. We have a single source that says BZM2 is built on TSMC N5, delivering 35 J/TH, which by the same metric would represent a 37% power saving compared to the first generation. However, this information may not be correct; we are looking at the second source.
We don’t know why Intel is talking about its first-gen chip at the ISSCC when it’s already taking orders for its second-gen hardware – maybe it’s just because Intel doesn’t want to divulge details about its state-of-the-art equipment. This despite the fact that Intel’s new CEO, Pat Gelsinger, often repeats commitment be more open.
competition and the market
The latest generation of Bitmain is built on TSMC N5, features almost the same efficiency. We fetched the numbers for the S19j Pro 104, built on TSMC N7, knowing that a full system packs 384 chips at 2750-3250W. That equates to around 7-8W per chip, or 3 times what Intel suggests their chip can do. We are also seeing reports that these TSMC N7 chips each have over a billion transistors. In order to compete for density, we’re going to see systems with 2-3x more chips. In any case, it will be a way for Intel to fill its 7 nm fabs with small, high-efficiency silicon.
It should be noted that if Intel had an order for 29.5 million chips (as shown above, for $867 million), at a perfect yield of 4,000 per wafer, it would take nearly 7,500 wafers. Intel cites market research that indicates it expects the cryptocurrency mining hardware market to grow by $2.8 billion between 2021 and 2025.
I spoke with a colleague who is more focused on the mining/ASIC space, and he said it’s likely that US-based ASIC production will be an advantage for locality, language, and relationships, and avoid additional 25% tariffs currently on mining hardware. I assume Intel will work with specific partners who have minimum order requirements for this type of hardware.
This is unlikely to mean much for the beleaguered GPU market – just hope they don’t put one on the GPU card as a way to help miners “recoup” the cost of the GPU itself. We’re in a good timeline, aren’t we?
If anyone has die sizes of competitive ASICs on the market, please let me know.
Update: Last week, one of Intel’s senior directors, we believe Director of Custom Accelerators, was hired by Bitfury.
Update 2: Intel has contacted us to inform us that the ISSCC discussion is for their first generation BZM1 ASIC. The deal with Griid is for its second-generation ASIC BZM2, which will be discussed later. The article has been updated to clarify this.
