The Indian Institute of Science (IISc) will partner with Samsung Semiconductor India Research (SSIR) for research and development in the field of on-chip electrostatic discharge (ESD) protection.
Under a research agreement, the partners propose to create state-of-the-art ESD device solutions to protect ultra-high-speed serial interfaces in advanced integrated circuit (IC) and system-on-chip (SoC) products.
The IISc said on Wednesday that the related research will be carried out by Professor Mayank Shrivastava’s group at the IISc’s Department of Electronic Systems Engineering. Solutions from this research will be deployed in Samsung’s advanced process nodes.
Integrated circuits and SoCs, both essential to all systems, are highly susceptible to ESD failures, especially those developed using advanced nanoscale Complementary Metal Oxide Semiconductor (CMOS) technologies. ESD failures contribute to most IC chip failures and field backfires. The partnership is significant considering that R&D in ESD technology for highly reliable interfaces and SoCs operating at low power and high speed is an integral part of innovation in semiconductors.
Balajee Sowrirajan, CVP and MD at SSIR, Bengaluru, said SSIR aims to facilitate postgraduate training programs, opening opportunities for students to pursue internships in industry and encouraging young researchers to become entrepreneurs .
Professor Govindan Rangarajan, Director of the IISc, said the partnership “reinforces” the IISc’s commitment to strengthening industry-academia engagements that can have a significant impact in the years to come.
